Computers / Programming / Language References / Assembly / MOS 6502 / MOS 6502 Instruction Set

This page describes the addressing modes and instructions available on the MOS 6502 processor.

Addressing Modes

The 6502 has 12 addressing modes which dictate how the bytes of the instruction are interpreted.

Accumulator

A one byte instruction with the operand of the instruction being the accumulator

Accumulator instructions have A as an operand

Immediate

A two byte instruction with the second byte being a constant value to be used by the instruction

Immediate instructions have a value or expression preceded by an # as an operand

Zero Page

A two byte instruction with the second byte being an address in the zero page (First 256 bytes of memory) used by the instruction.

Zero page instructions take addresses less than 256 as an operand

Zero Page, X

A two byte instruction with the second byte being a base address in the zero page (First 256 bytes of memory). The X Index register is added to the base address to give the effective address to be used by the instruction.

Note that the high-byte of the address is forced to be 0 for Zero Page operations so the index calculation can cause a warp around.

X indexed Zero Page instructions have an address less than 256 followed by a comma and an X as an operand

Zero Page, Y

A two byte instruction with the second byte being a base address in the zero page (First 256 bytes of memory). The Y Index register is added to the base address to give the effective address to be used by the instruction.

Note that the high-byte of the address is forced to be 0 for Zero Page operations so the index calculation can cause a warp around.

Y indexed Zero Page instructions have an address less than 256 followed by a comma and a Yas an operand

Absolute

A three byte instruction with the second and third bytes specifying an address to be used by the instruction. The address is stored low-order byte first.

Absolute instructions have an address greater than or equal 256 (if there is no Zero Page version of the instruction, then any address is treated as absolute) as an operand

Absolute, X

A three byte instruction with the second and third bytes specifying a base address. The address is stored low-order byte first. The X Index register is added to the base address to give the effective address to be used by the instruction.

X indexed Absolute instructions have an address greater than or equal 256 (if there is no Zero Page version of the instruction, then any address is treated as absolute) followed by a comma and an X as an operand

Absolute, Y

A three byte instruction with the second and third bytes specifying a base address. The address is stored low-order byte first. The Y Index register is added to the base address to give the effective address to be used by the instruction.

Y indexed Absolute instructions have an address greater than or equal 256 (if there is no Zero Page version of the instruction, then any address is treated as absolute) followed by a comma and an Y as an operand

Implied

A single byte instruction with the opcode specifying the parameters of the instruction

Implied instructions have no operands

Relative

A two byte instruction with the second byte being a signed offset that specifies the address to use for the instruction.

Note the the offset is relative to the start of the next instruction in memory as the PC will be pointing to that location when the offset is applied.

Relative instructions often take an address or a label as an operand and then the assembler determines the appropriate offset to encode in the instruction

(Indirect, X)

A two byte instruction with the second byte being a base address in the zero page (First 256 bytes of memory). The X Index register is added to the base address and then the two bytes at that location are used as the effective address for the instruction. The address in the zero page is stored low-order byte first.

Indirect X instructions have an address less than 256 followed by a comma and then an X with everything enclosed in parenthesis as an operand. The X is inside the parenthesis to indicate that the indirection is applied after the indexing

(Indirect), Y

A two byte instruction with the second byte being a base address in the zero page (First 256 bytes of memory). The Y index register is added to the two bytes at that location and the result is used as the effective address for the instruction. The address in the zero page is stored low-order byte first.

Indirect Y instructions have an address less than 256 enclosed in parenthesis followed by a comma and then a Y as an operand. The Y is outside the parenthesis to indicate that the indirection is applied before the indexing

(Absolute Indirect)

A three byte instruction with the second and third bytes specifying an address. Two bytes are loaded from this location and used as the effective address for the instruction. Both addresses are stored low-order byte first.

Absolute Indirect instructions take an address in parenthesis as an operand.

Instruction Formats

All of the 6502 instructions use a single byte opcode. The addressing mode indicated by the opcode indicate what additional data is included following the instruction

Fields

Data

Represents an integer value

Zero Page Address

The low order byte of an address in the zero page (The first 256 bytes of memory).

Address

A full 16-bit address, stored low byte first

Formats

Accumulator and Implied

7
0
Op Code

Immediate and Relative

7
0
Op Code
Data

Zero Page and Zero Page Indirect

7
0
Op Code
Zero Page Address

Absolute and Absolute Indirect

7
0
Op Code
Low Address Byte
High Address Byte

Instructions

Operands

X Index Register (X)

The X Index register

Y Index Register (Y)

The Y Index register

data

Immediate data used by the instruction

Zero Page Address (zpAddress)

An address in the zero page

Absolute Address (address)

An address to anywhere in memory

offset

The relative offset of where to branch to

Data Transfer Instructions

Load Accumulator (LDA)

Loads the specified value into the Accumulator

Instruction Addressing Mode Binary Opcode Octal Hex
LDA (zpAddress, X) (Indirect, X) 10100001 241 A1
LDA zpAddress Zero Page 10100101 245 A5
LDA #data Immediate 10101001 251 A9
LDA address Absolute 10101101 255 AD
LDA (zpAddress), Y (Indirect), Y 10110001 261 B1
LDA zpAddress, X Zero Page, X 10110101 265 B5
LDA address, Y Absolute, Y 10111001 271 B9
LDA address, X Absolute, X 10111101 275 BD

Load Index X (LDX)

Loads the specified value into the X Register

Instruction Addressing Mode Binary Opcode Octal Hex
LDX #data Immediate 10100010 242 A2
LDX zpAddress Zero Page 10100110 246 A6
LDX address Absolute 10101110 256 AE
LDX zpAddress, Y Zero Page, Y 10110110 266 B6
LDX address, Y Absolute, Y 10111110 276 BE

Load Index Y (LDY)

Loads the specified value into the Y Register

Instruction Addressing Mode Binary Opcode Octal Hex
LDY #data Immediate 10100000 240 A0
LDY zpAddress Zero Page 10100100 244 A4
LDY address Absolute 10101100 254 AC
LDY zpAddress, X Zero Page, X 10110100 264 B4
LDY address, X Absolute, X 10111100 274 BC

Store Accumulator (STA)

Stores the value in the Accumulator at the specified location

Instruction Addressing Mode Binary Opcode Octal Hex
STA (zpAddress, X) (Indirect, X) 10000001 201 81
STA zpAddress Zero Page 10000101 205 85
STA address Absolute 10001101 215 8D
STA (zpAddress), Y (Indirect), Y 10010001 221 91
STA zpAddress, X Zero Page, X 10010101 225 95
STA address, Y Absolute, Y 10011001 231 99
STA address, X Absolute, X 10011101 235 9D

Store Index X (STX)

Stores the value in the X Register at the specified location

Instruction Addressing Mode Binary Opcode Octal Hex
STX zpAddress Zero Page 10000110 206 86
STX address Absolute 10001110 216 8E
STX zpAddress, Y Zero Page, Y 10010110 226 96

Store Index Y (STY)

Stores the value in the Y Register at the specified location

Instruction Addressing Mode Binary Opcode Octal Hex
STY zpAddress Zero Page 10000100 204 84
STY address Absolute 10001100 214 8C
STY zpAddress, X Zero Page, X 10010100 224 94

Register Transfer Instructions

Transfer Accumulator to Index X (TAX)

Transfer the value in the Accumulator to the X Register

Instruction Addressing Mode Binary Opcode Octal Hex
TAX Implied 10101010 252 AA

Transfer Accumulator to Index Y (TAY)

Transfer the value in the Accumulator to the Y Register

Instruction Addressing Mode Binary Opcode Octal Hex
TAY Implied 10101000 250 A8

Transfer Index X to Accumulator (TXA)

Transfer the value in the X Register to the Accumulator

Instruction Addressing Mode Binary Opcode Octal Hex
TXA Implied 10001010 212 8A

Transfer Index Y to Accumulator (TYA)

Transfer the value in the Y Register to the Accumulator

Instruction Addressing Mode Binary Opcode Octal Hex
TSX Implied 10011000 230 98

Transfer Stack Pointer to Index X (TSX)

Transfer the S Register to the X Register

Instruction Addressing Mode Binary Opcode Octal Hex
TYA Implied 10111010 272 BA

Transfer Index X to Stack Pointer (TXS)

Transfer the value in the X Register to the S Register

Instruction Addressing Mode Binary Opcode Octal Hex
TXS Implied 10011010 232 9A

Addition Instruction

Add to Accumulator with Carry (ADC)

Adds the specified value and the carry bit to the Accumulator. The result is stored in the Accumulator.

Instruction Addressing Mode Binary Opcode Octal Hex
ADC (zpAddress, X) (Indirect, X) 01100001 141 61
ADC zpAddress Zero Page 01100101 145 65
ADC #data Immediate 01101001 151 69
ADC address Absolute 01101101 155 6D
ADC (zpAddress), Y (Indirect), Y 01110001 161 71
ADC zpAddress, X Zero Page, X 01110101 165 75
ADC address, Y Absolute, Y 01111001 171 79
ADC address, X Absolute, X 01111101 175 7D

Subtraction Instruction

Subtract from Accumulator with Borrow (SBC)

Subtracts the specified value and the borrow bit from the Accumulator. The result is stored in the Accumulator.

Instruction Addressing Mode Binary Opcode Octal Hex
SBC (zpAddress, X) (Indirect, X) 11100001 341 E1
SBC zpAddress Zero Page 11100101 345 E5
SBC #data Immediate 11101001 351 E9
SBC address Absolute 11101101 355 ED
SBC (zpAddress), Y (Indirect), Y 11110001 361 F1
SBC zpAddress, X Zero Page, X 11110101 365 F5
SBC address, Y Absolute, Y 11111001 371 F9
SBC address, X Absolute, X 11111101 375 FD

Increment/Decrement Instructions

Decrement Memory by One (DEC)

Subtracts 1 from the specified value and stores the result in the same location

Instruction Addressing Mode Binary Opcode Octal Hex
DEC zpAddress Zero Page 11000110 306 C6
DEC address Absolute 11001110 316 CE
DEC zpAddress, X Zero Page, X 11010110 326 D6
DEC address, X Absolute, X 11011110 336 DE

Decrement Index X by One (DEX)

Subtracts 1 from the X Register and stores the result in the X Register

Instruction Addressing Mode Binary Opcode Octal Hex
DEX Implied 11001010 312 CA

Decrement Index Y by One (DEY)

Subtracts 1 from the Y Register and stores the result in the Y Register

Instruction Addressing Mode Binary Opcode Octal Hex
DEY Implied 10001000 210 88

Increment Memory by One (INC)

Add 1 to the specified value and stores the result in the same location

Instruction Addressing Mode Binary Opcode Octal Hex
INC zpAddress Zero Page 11100110 346 E6
INC address Absolute 11101110 356 EE
INC zpAddress, X Zero Page, X 11110110 366 F6
INC address, X Absolute, X 11111110 376 FE

Increment Index X by One (INX)

Add 1 to the X Register and stores the result in the X Register

Instruction Addressing Mode Binary Opcode Octal Hex
INX Implied 11101000 350 E8

Increment Index Y by One (INY)

Add 1 to the Y Register and stores the result in the Y Register

Instruction Addressing Mode Binary Opcode Octal Hex
INY Implied 11001000 310 C8

Rotate/Shift Instructions

Shift Left One Bit (ASL)

Shifts the specified value Left one bit. The High-order bit is placed in the carry flag and the low order bit is set to 0. The result is stored in the same location.

Instruction Addressing Mode Binary Opcode Octal Hex
ASL zpAddress Zero Page 00000110 006 06
ASL A Accumulator 00001010 012 0A
ASL address Absolute 00001110 016 0E
ASL zpAddress, X Zero Page, X 00010110 026 16
ASL address, X Absolute, X 00011110 036 1E

Shift Right One Bit (LSR)

Shifts the specified value right one bit. The low-order bit is placed in the carry flag and the high-order bit is set to 0. The result is stored in the same location.

Instruction Addressing Mode Binary Opcode Octal Hex
LSR zpAddress Zero Page 01000110 106 46
LSR A Accumulator 01001010 112 4A
LSR address Absolute 01001110 116 4E
LSR zpAddress, X Zero Page, X 01010110 126 56
LSR address, X Absolute, X 01011110 136 5E

Rotate One Bit Left (ROL)

Rotates the specified value left one bit. The high-order bit is placed in the carry flag and the low-order bit is set to the previous value of Carry Flag. The result is stored in the same location.

Instruction Addressing Mode Binary Opcode Octal Hex
ROL zpAddress Zero Page 00100110 046 26
ROL A Accumulator 00101010 052 2A
ROL address Absolute 00101110 056 2E
ROL zpAddress, X Zero Page, X 00110110 066 36
ROL address, X Absolute, X 00111110 076 3E

Rotate One Bit Right (ROR)

Rotates the specified value right one bit. The low-order bit is placed in the carry flag and the high-order bit is set to the previous value of Carry Flag. The result is stored in the same location.

Instruction Addressing Mode Binary Opcode Octal Hex
ROR zpAddress Zero Page 01100110 146 66
ROR A Accumulator 01101010 152 6A
ROR address Absolute 01101110 156 6E
ROR zpAddress, X Zero Page, X 01110110 166 76
ROR address, X Absolute, X 01111110 176 7E

Logical Instructions

AND with Accumulator (AND)

Logical ANDs the specified value with Accumulator. The result is stored in the Accumulator.

Instruction Addressing Mode Binary Opcode Octal Hex
AND (zpAddress, X) (Indirect, X) 00100001 041 21
AND zpAddress Zero Page 00100101 045 25
AND #data Immediate 00101001 051 29
AND address Absolute 00101101 055 2D
AND (zpAddress), Y (Indirect), Y 00110001 061 31
AND zpAddress, X Zero Page, X 00110101 065 35
AND address, Y Absolute, Y 00111001 071 39
AND address, X Absolute, X 00111101 075 3D

Exclusive Or with Accumulator (EOR)

Logical Exclusive Or the specified value with Accumulator. The result is stored in the Accumulator.

Instruction Addressing Mode Binary Opcode Octal Hex
EOR (zpAddress, X) (Indirect, X) 01000001 101 41
EOR zpAddress Zero Page 01000101 105 45
EOR #data Immediate 01001001 111 49
EOR address Absolute 01001101 115 4D
EOR (zpAddress), Y (Indirect), Y 01010001 121 51
EOR zpAddress, X Zero Page, X 01010101 125 55
EOR address, Y Absolute, Y 01011001 131 59
EOR address, X Absolute, X 01011101 135 5D

OR with Accumulator (ORA)

Logical Or the specified value with Accumulator. The result is stored in the Accumulator.

Instruction Addressing Mode Binary Opcode Octal Hex
ORA (zpAddress, X) (Indirect, X) 00000001 001 01
ORA zpAddress Zero Page 00000101 005 05
ORA #data Immediate 00001001 011 09
ORA address Absolute 00001101 015 0D
ORA (zpAddress), Y (Indirect), Y 00010001 021 11
ORA zpAddress, X Zero Page, X 00010101 025 15
ORA address, Y Absolute, Y 00011001 031 19
ORA address, X Absolute, X 00011101 035 1D

Status Flag Instructions

Clear Carry Flag (CLC)

Changes Carry Flag to 0

Instruction Addressing Mode Binary Opcode Octal Hex
CLC Implied 00011000 030 18

Clear Decimal Mode (CLD)

Changes Decimal Flag to 0

Instruction Addressing Mode Binary Opcode Octal Hex
CLD Implied 11011000 330 D8

Clear Interrupt Disable Bit (CLI)

Changes Interrupt Disable Flag to 0

Instruction Addressing Mode Binary Opcode Octal Hex
CLI Implied 01011000 130 58

Clear Overflow Flag (CLV)

Changes Overflow Flag to 0

Instruction Addressing Mode Binary Opcode Octal Hex
CLV Implied 10111000 270 B8

Set Carry Flag (SEC)

Set Carry Flag to 1

Instruction Addressing Mode Binary Opcode Octal Hex
SEC Implied 00111000 070 38

Set Decimal Mode (SED)

Set Decimal Flag to 1

Instruction Addressing Mode Binary Opcode Octal Hex
SED Implied 11111000 370 F8

Set Interrupt Disable status (SEI)

Set Interrupt Disable Flag to 1

Instruction Addressing Mode Binary Opcode Octal Hex
SEI Implied 01111000 170 78

Compare Instructions

Test Bits (BIT)

Logical ANDs the specified value with Accumulator. The result isn't stored but the zero flag will be set based on the result. The negative flag will contain bit 7 of the specified value and the overflow flag will contain bit 6 of the specified value.

Instruction Addressing Mode Binary Opcode Octal Hex
BIT zpAddress Zero Page 00100100 044 24
BIT address Absolute 00101100 054 2C

Compare with Accumulator (CMP)

Subtracts the specified value from the accumulator. The status flags are updated based on the result but the result isn't saved

Instruction Addressing Mode Binary Opcode Octal Hex
CMP (zpAddress, X) (Indirect, X) 11000001 301 C1
CMP zpAddress Zero Page 11000101 305 C5
CMP #data Immediate 11001001 311 C9
CMP address Absolute 11001101 315 CD
CMP (zpAddress), Y (Indirect), Y 11010001 321 D1
CMP zpAddress, X Zero Page, X 11010101 325 D5
CMP address, Y Absolute, Y 11011001 331 D9
CMP address, X Absolute, X 11011101 335 DD

Compare with Index X (CPX)

Subtracts the specified value from the X Register. The status flags are updated based on the result but the result isn't saved

Instruction Addressing Mode Binary Opcode Octal Hex
CPX #data Immediate 11100000 340 E0
CPX zpAddress Zero Page 11100100 344 E4
CPX address Absolute 11101100 354 EC

Compare with Index Y (CPY)

Subtracts the specified value from the Y Register. The status flags are updated based on the result but the result isn't saved

Instruction Addressing Mode Binary Opcode Octal Hex
CPY #data Immediate 11000000 300 C0
CPY zpAddress Zero Page 11000100 304 C4
CPY address Absolute 11001100 314 CC

Branch Instructions

Branch on Carry Clear (BCC)

Branch to the specified address if carry flag is cleared

Instruction Addressing Mode Binary Opcode Octal Hex
BCC offset Relative 10010000 220 90

Branch on Carry Set (BCS)

Branch to the specified address if carry flag is set

Instruction Addressing Mode Binary Opcode Octal Hex
BCS offset Relative 10110000 260 B0

Branch on Result Zero (BEQ)

Branch to the specified address if zero flag is set (equal)

Instruction Addressing Mode Binary Opcode Octal Hex
BEQ offset Relative 11110000 360 F0

Branch on Result Minus (BMI)

Branch to the specified address if negative flag is set (minus)

Instruction Addressing Mode Binary Opcode Octal Hex
BMI offset Relative 00110000 060 30

Branch on Result Not Zero (BNE)

Branch to the specified address if zero flag is cleared (not equal)

Instruction Addressing Mode Binary Opcode Octal Hex
BNE offset Relative 11010000 320 D0

Branch on Result Plus (BPL)

Branch to the specified address if negative flag is cleared (plus)

Instruction Addressing Mode Binary Opcode Octal Hex
BPL offset Relative 00010000 020 10

Branch on Overflow Clear (BVC)

Branch to the specified address if overflow flag is cleared

Instruction Addressing Mode Binary Opcode Octal Hex
BVC offset Relative 01010000 120 50

Branch on Overflow Set (BVS)

Branch to the specified address if overflow flag is set

Instruction Addressing Mode Binary Opcode Octal Hex
BVS offset Relative 01110000 160 70

Jump Instructions

Jump to New Location (JMP)

Loads the Program Counter with the address specified

Instruction Addressing Mode Binary Opcode Octal Hex
JMP address Absolute 01001100 114 4C
JMP (address) (Indirect) 01101100 154 6C

Jump to Subroutine (JSR)

Stores the address of the last byte of the instruction on the stack. Loads the Program Counter with the address specified

Instruction Addressing Mode Binary Opcode Octal Hex
JSR address Absolute 00100000 040 20

Return Instructions

Return from Interrupt (RTI)

Restores the Status Register from the Stack. Restores the Program Counter from the stack.

Instruction Addressing Mode Binary Opcode Octal Hex
RTI Implied 01000000 100 40

Return from Subroutine (RTS)

Pops the Program Counter from the stack and adds one

Instruction Addressing Mode Binary Opcode Octal Hex
RTS Implied 01100000 140 60

Stack Instructions

Push Accumulator on Stack (PHA)

Pushes the value in the Accumulator on to the stack

Instruction Addressing Mode Binary Opcode Octal Hex
PHA Implied 01001000 110 48

Push Processor Status on Stack (PHP)

Pushes the value in the Status Register on to the stack

Instruction Addressing Mode Binary Opcode Octal Hex
PHP Implied 00001000 010 08

Pull Accumulator from Stack (PLA)

Pulls a value from the stack and stores it in the Accumulator

Instruction Addressing Mode Binary Opcode Octal Hex
PLA Implied 01101000 150 68

Pull Processor Status from Stack (PLP)

Pulls a value from the stack and stores it in the Status Register

Instruction Addressing Mode Binary Opcode Octal Hex
PLP Implied 00101000 050 28

Machine Control Instructions

Force Break (BRK)

Force break. Sets the break flag.

Instruction Addressing Mode Binary Opcode Octal Hex
BRK Implied 00000000 000 00

No-Operation (NOP)

No Operation

Instruction Addressing Mode Binary Opcode Octal Hex
NOP Implied 11101010 352 EA